TestBenchBlock.hh

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/*
 Copyright (c) 2002-2015 Tampere University.
 
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/*
 * @file TestBenchBlock.hh
 *
 * Declaration of TestBenchBlock class.
 *
 * Created on: 7.9.2015
 * @author Henry Linjamäki 2015 (henry.linjamaki-no.spam-tut.fi)
 * @note rating: red
 */
 
#ifndef TESTBENCHBLOCK_HH
#define TESTBENCHBLOCK_HH
 
#include "BaseNetlistBlock.hh"
 
#include "Exception.hh"
 
namespace ProGe {
 
class ProGeContext;
class ProcessorWrapperBlock;
 
/*
 * Block that generates testbench template for TTA cores to run
 * programs in RTL simulations.
 */
class TestBenchBlock: public BaseNetlistBlock {
public:
    TestBenchBlock() = delete;
    TestBenchBlock(
        const ProGeContext& context, const BaseNetlistBlock& coreBlock);
    virtual ~TestBenchBlock();
 
    virtual void write(
        const Path& targetBaseDir, HDL targetLang = VHDL) const override;
 
private:
 
    /// The ProGe context for additional information.
    const ProGeContext& context_;
    /// The block that wraps the processor and instantiates memories for the
    /// GCU and LSUs
    ProcessorWrapperBlock* proc_;
};
class TestBenchBlock: public BaseNetlistBlock {…};
 
} /* namespace ProGe */
 
#endif /* TESTBENCHBLOCK_HH */